tPad Multimedia Development Kit / Video and Embedded Development Kit (VEEK)

terasic tPAD sleek design

5Mega pixel built-in camera

touch screen panel

The tPad Multimedia Development Kit, with the DE2-115 board targeting the Cyclone IV FPGA, as well as an LCD multimedia touch panel and a 5-Megapixel digital image sensor module being equipped, is a comprehensive design environment with everything embedded developers need to create multimedia-based systems.

The tPad delivers an integrated platform that includes hardware, design tools, intellectual property (IP) and reference designs for developing embedded software and hardware platform in a wide range of applications. With these provided one-stop service resources, users could greatly reduce development threshold and cycle.

Arria II GX FPGA Development Kit, 6G Edition

The Altera^® Arria^® II GX FPGA Development Kit, 6G Edition delivers a complete system-level design environment with the hardware and software needed to immediately begin developing 6G FPGA designs. With this PCI-SIG-compliant board and a one-year license for Quartus^® II design software, you can:

• Develop and test FPGA designs with transceivers supporting up to 6.375-Gbps data rates
• Develop and test memory subsystems consisting of DDR2 and DDR3 memory
• Develop and test designs based on other Arria II GX-supported protocol interfaces such as PCI Express 1.0, Gigabit Ethernet, SDI, CPRI, OBSAI, SAS/SATA, and Serial RapidIO^®. Many of these are supported by taking advantage of this board's modular capability through the high-speed mezzanine card (HSMC) connectors andover 20 different HSMC connectors available through Altera partners.

Arria II GX FPGAs also support other protocols.

100G Development Kit, Stratix IV GT Edition

Altera's 100G Development Kit, Stratix^® IV GT Edition enables a thorough evaluation of 100G designs by allowing you to:

• Support 10G/40G and 100G line interfaces through optical modules
• Support applications requiring external memory interfaces, through 4x18 ADRII and 4x32 DDR3 memory banks
• Use system side interfaces via two pairs of FCI AirMax connectors
• Complete line side (optical modules) to system side (AirMax connector) datapath analysis
• Evaluate transceiver performance up to 11.3 Gbps
• Verify physical medium attachment (PMA) compliance to 10G/40G/100G Ethernet, Interlaken, CEI-6G/11G, PCI Express (Gen1, Gen2, and Gen3), Serial RapidIO^®, and other major standards
• Validate interoperability between optical modules such as SFP, SFP+, QSFP, and CFP

FPGA Developer first page

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